1. Field of the Invention
The invention relates to the field of the methods for fabricating piezoresistive accelerometers.
2. Description of the Prior Art
The fabrication of piezoresistive accelerometers is well known. While silicon-on-insulator (SOI) wafers have previously been utilized to fabricate piezoelectric accelerometers, these prior art processes use comparatively complex fabrication steps that require multiple masks and additional doping of the wafers. Examples of such processes are disclosed in Partridge et. al. “A High-Performance Planar Piezoresistive Accelerometer”, Journal of Microelectromechanical Systems, Vol. 9, No. 1, pp. 58-66, 2000; and S. Huang et. al. “A Piezoresistive Accelerometer with Axially Stressed Tiny Beams for both Much Increased Sensitivity and Much Broadened Frequency Bandwidth”, IEEE Transducers Conference 2003, pp. 91-94, 2003.
The manufacture of piezoresistive angular accelerometers is also previously known. However, their fabrication is comparatively complex and requires additional doping of the wafers. Examples such disclosures can be found in N. Furukawa et. al., “A structure of angular acceleration sensor using silicon cantilevered beam with piezoresistors”, IEEE Conference on Industrial Electronics, Control, Instrumentation, and Automation, 1992, pp. 1524-1529, 1992.
SOI fabrication processes have been used in the past to achieve less temperature sensitive pressure sensors. However, pressure sensors are very different from accelerometers and do not require a free-standing proof mass. Also, while utilizing SOI wafers, these prior art methods still require multiple fabrication steps and masks. Disclosures are to be found in “Dielectrically Isolated Transducer Employing Single Crystal Strain Gages”, U.S. Pat. No. 4,510,671.
Piezoresistive accelerometers are traditionally fabricated by doping selected areas of a wafer to create isolated pn-junctions. Often, two separate doping steps are employed to obtain both highly-doped conductors as well as lightly-doped piezoresistors. Once the piezoresistors and conductors have been defined, additional fabrication steps are required to etch the suspension system as well as the free-standing proof mass, which normally deflects in the out-of-plan direction. Typical disclosures are published in L. Roylance et. al., “A batch fabricated silicon accelerometer”, IEEE Transactions on Electron Devices, ED-26, pp. 1911-1917, 1979; and I. Pavelescu et. al., “Uniaxial silicon piezoresistive accelerometer”, IEEE International Semiconductor Conference, 2000, vol. 2, pp. 479-482, October 2000. Normally four or more masks are used in the prior art fabrication process making for complex and costly manufacturing. In addition, pn-junctions have high leakage currents at temperatures above 150° C., which is therefore the highest operational temperature of the sensors.
What is needed is a fabrication process that defines all components simultaneously in a Silicon-on-Insulator (SOI) wafer using a single mask. Further, what is needed is a fabrication technique which reduces the complexity of the fabrication and to allow for higher operational temperatures than traditional piezoresistive accelerometers by elimination of any pn-junction.